The filter section uses a switched capacitor technique for both high and low group filters and dial tone rejection. This DTMF receiver minimizes external component count by providing an on-chip differential input amplifier, clock generator, and a latched three-state interface bus. The on-chip clock generator requires only a low cost TV crystal or ceramic resonator as an external component. All rights reserved. This device contains input protection against damage due to high static voltages or electric fields; however, precautions should be taken to avoid application of voltages higher than the maximum rating. Notes: 1.
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The filter section uses a switched capacitor technique for both high and low group filters and dial tone rejection. This DTMF receiver minimizes external component count by providing an on-chip differential input amplifier, clock generator, and a latched three-state interface bus.
The on-chip clock generator requires only a low cost TV crystal or ceramic resonator as an external component. All rights reserved. This device contains input protection against damage due to high static voltages or electric fields; however, precautions should be taken to avoid application of voltages higher than the maximum rating.
Notes: 1. Exceeding these ratings may cause permanent damage, functional operation under these conditions is not implied. Deviation Aceept Limit Freq. Digit sequence consists of all 16 DTMF tones. Tone pause 40ms. Nominal DTMF frequencies are used. Both tones in the composite signal have an equal amplitude.
Bandwidth limited to 3KHz Gaussian Noise. For an error rate of better than 10, 9. Referenced to lowest level frequency component in DTMF signal. Minimum signal acceptance level is measured with specified maximum frequency deviation. External voltage source used to bias VREF. This parameter also applies to a third tone injected onto the power supply. Referenced to Figure 1. Times shown are obtained with circuit in Figure 1 User adjustable.
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